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CXK5B81020J/TM -12
131072-word x 8-bit High Speed Bi-CMOS Static RAM
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Description CXK5B81020J/TM is a high speed 1M bit Bi-CMOS static RAM organized as 131072 words by 8 bits. Operating on a single 3.3V supply this asynchronous IC is suitable for use in high speed and low power applications. Features * Single 3.3V power supply: 3.3V 0.3V * Fast access time 12ns (Max.) * Low standby current: 10mA (Max.) * Low power operation 864mW (Max.) * Package line-up Dual Vcc/Vss CXK5B81020J 400mil 32pin SOJ package CXK5B81020TM 400mil 32pin TSOP package CXK5B81020J 32 pin SOJ (PIastic) CXK5B81020TM 32 pin TSOP (PIastic)
Function 131072 word x 8-bit static RAM Structure Silicon gate Bi-CMOS IC
Block Diagram
A15 A16 A9 A8 A13 A14 A11 A10 Buffer Row Decoder Memory Matrix 256 x 4096
Pin Configuration (Top View) Pin Description Symbol A0 to A16 I/O1 to I/O8 CE WE OE VCC GND NC Description Address input Data input Chip enable input Write enable input Output enable input +3.3V power supply Ground No connection
A3 Vcc A2 A1 A0 CE GND
1 2 3 4 5
32 A4 31 A5 30 A6 29 A7 28 OE 27 I/O8 26 I/O7 25 GND 24 Vcc 23 I/O6 22 I/O5 2 A8 1 20 A9 19 A10 18 A11 17 A12
I/O1 6 I/O2 7 Vcc
8
GND 9 A12 A5 A4 A3 A0 A2 A1 A6 A7 Buffer I/O Gate Column Decoder I/O3 1 I/O4 11 WE 12 A16 13 A15 14 A14 15 A13 16
0
WE OE CE
I/O Buffer
I/O1 I/O8
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E93707B58-PP
CXK5B81020J/TM
Absolute Maximum Ratings Item Supply voltage Input voltage Input and output voltage Allowable power dissipaiton Operating temperature Storage temperature Symbol VCC VIN VI/O PD Topr Tstg J
(Ta = 25C, GND = 0V) Rating -0.51 to +4.6 -0.51 to VCC + 0.5 -0.51 to VCC + 0.5 1.52 0 to +70 -55 to +150 260 * 10 Unit V V V W C C C * sec C * sec
235 * 10 TM 1 Vcc, VIN, VI/O = -2.0V Min. for pulse width less than 5ns. 2 Air flow 1m/s. Truth Table CE H L L L OE x L x H WE x H L H Mode Not selected Read Write Output disable I/O1 to I/O8 High Z Data out Data in High Z Current ISB1, ISB2 ICC ICC ICC
Soldering temperature * time Tsolder
x: "H" or "L" Recommended Operating Conditions Item Supply voltage Input high voltage Input low voltage Symbol VCC VIH VIL Min. 3.0 2.0 -0.3 (Ta = 0 to +70C, GND = 0V) Typ. 3.3 -- -- Max. 3.6 VCC + 0.3 0.8 Unit V V V
VIL = -2.0V Min. for pulse width less than 5ns.
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CXK5B81020J/TM
Electrical Characteristics DC Characteristics Item Input leakage current Symbol ILI (Vcc = 3.3V 0.3V, GND = 0V, Ta = 0 to +70C) Conditions VIN = GND to VCC CE = VIH or OE = VIH or WE = VIL VI/O = GND to VCC Cycle: Min. Duty = 100% IOUT = 0mA CE = VIL VIN = VIH or VIL CE VCC - 0.2V VIN VCC - 0.2V or VIN 0.2V Cycle: Min. Duty = 100% CE = VIH VIN = VIH or VIL IOH = -2.0mA IOL = 2.0mA Min. -10 Typ. -- Max +10 Unit A
Output leakage current
ILO
-10
--
+10
A
Average operating current
ICC
--
--
240
mA
ISB1 Standby current ISB2
--
--
10
mA
-- 2.4 --
-- -- --
100 -- 0.4
mA V V
Output high voltage Output low voltage Vcc = 3.3V, Ta = 25C I/O Capacitance Item Input capacitance I/O capacitance
VOH VOL
(Ta = 25C, f = 1MHz) Symbol CIN CI/O Conditions VIN = 0V VI/O = 0V Min. -- -- Typ. -- -- Max 5 7 Unit pF pF
Note) This parameter is sampled and is not 100% tested. AC Characteristics * AC test condition (Vcc = 3.3V 0.3V, Ta = 0 to +75C) Item Input pulse high level Input pulse low level Input rise time Input fall time Input and output reference level Output load conditions Condition VIH = 3.0V VIL = 0.0V
I/O Output load (1) Zo = 50 Output Load (2)1 3.3V 1179
tr = 2ns tf = 2ns
1.4V Fig. 1
RL = 50 VL = 1.4V
I/O
5pF2
868
1. tLZ, tOLZ, tHZ, tOHZ, tOW, tWHZ 2. Including scope and jig capacitances
Fig. 1
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CXK5B81020J/TM
* Read cycle Item Read cycle time Address access time Chip enable access time Output enable to output valid Output data hold time Chip enable to output in low Z (CE) Output enable to output in low Z (OE) Chip disable to output in high Z (CE) Output disable to output in high Z (OE) Symbol -12 Min. 12 -- -- -- 3 3 0 0 0 Max. -- 12 12 6 -- -- -- 6 6 ns ns ns ns ns ns ns ns ns Unit
tRC tAA tCO tOE tOH tLZ tOLZ tHZ tOHZ
Transition is measured 200mV from steady voltage with specified loading in Fig. 1 1-(2). This parameter is sampled and is not 100% tested.
* Write cycle Item Write cycle time Address valid to end of write Chip enable to end of write Data valid to end of write Data hold from end of write Write pulse width Address set up time Write recovery time Output active from lend of write Write to output in high Z Symbol -12 Min. 12 10 10 8 0 10 0 0 4 0 Max. -- -- -- -- -- -- -- -- -- 6 ns ns ns ns ns ns ns ns ns ns Unit
tWC tAW tCW tDW tDH tWP tAS tWR tOW tWHZ
Transition is measured 200mV from steady voltage with specified loading in Fig. 1 1-(2). This parameter is sampled and is not 100% tested.
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CXK5B81020J/TM
Timing Waveform * Read cycle (1) : OE=VIL, WE=VIH
tRC Address tAA tOH Data out Previous data valid Data valid
* Read cycle (2) : WE=VIH
tRC Address tAA CE tLZ tCO
tHZ
OE tO E tOLZ Data out High impedance Data valid
tOHZ
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CXK5B81020J/TM
* Write cycle (1) : WE control
tWC Address tA
W
tWR
CE
tCW
tAS WE tWP
tDW Data in tWHZ Data valid
tDH
tOW Data out High impedance
* Write cycle (2) : CE control
tWC Address tA tAS CE
W
tWR tCW
tWP WE
tD
W
tD
H
Data in
Data valid
tLZ Data out
tWHZ
High impedance
Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition.
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CXK5B81020J/TM
Example of Representative Characteristics
Supply current vs. Supply voltage
1.4 1.4
Supply current vs. Ambient temperature
ICC -- Supply current [Normalized]
1.2
ICC -- Supply current [Normalized]
1.2
1.0
1.0
0.8 Ta = 25C
0.8 VCC = 3.3V
0.6 3.0
0.6 3.15 3.3 3.45 VCC -- Supply voltage [V] 3.6 0 20 40 60 Ta -- Ambient temperature [C] 80
Supply current vs. Frequency
12ns 1.0 1.8
Access time vs. Load capacitance
tAA, tCO, tOE -- Access time [Normalized]
tOE
ICC -- Supply current [Normalized]
0.75
1.6
0.5
1.4 tCO, tAA
0.25
1.2
Ta = 25C VCC = 3.3V
0 0 25 50 75 Frequency (1/tRC, 1/tWC) [MHz] 100
1.0 0 40 80 120 CL -- Load capacitance [pF] 160
Access time vs. Supply voltage
1.4 1.4
Access time vs. Load capacitance
tAA, tCO, tOE -- Access time [Normalized]
tAA, tCO, tOE -- Access time [Normalized]
1.2
tOE
1.2 tCO, tOE 1.0 tCO tAA tOE tAA
tAA, tCO 1.0
tAA tCO tOE
0.8 Ta = 25C
0.8 VCC = 3.3V
0.6 3.0
0.6 3.15 3.3 3.45 VCC -- Supply voltage [V] 3.6 0 20 40 60 Ta -- Ambient temperature [C] 80
-7-
CXK5B81020J/TM
Standby current vs. Supply voltage
1.4 1.4 ISB2
Standby current vs. Ambient temperature
ISB1, ISB2 -- Standby current [Normalized]
1.2
ISB1 -- Standby current [Normalized]
ISB1
1.2
1.0
1.0
0.8 Ta = 25C
0.8 VCC = 3.3V
0.6 3.0
0.6 3.15 3.3 3.45 VCC -- Supply voltage [V] 3.6 0 20 40 60 Ta -- Ambient temperature [C] 80
Input voltage level vs. Supply voltage
1.2 1.4
Standby current vs. Ambient temperature
VIL, VIH -- Input voltage [Normalized]
1.1
ISB2 -- Standby current [Normalized]
VIH VIL
1.2
1.0
1.0
0.9 Ta = 25C
0.8 VCC = 3.3V
0.8 3.0
0.6 3.15 3.3 3.45 VCC -- Supply voltage [V] 3.6 0 20 40 60 Ta -- Ambient temperature [C] 80
Output high current vs. Output high voltage
4.0
Output low current vs. Output low voltage
1.8
IOH -- Output high current [Normalized]
3.0
IOL -- Output low current [Normalized]
1.4
2.0
1.0
1.0 VCC = 3.3V
0.6 VCC = 3.3V
0.0 0.0
0.2 1.0 2.0 3.0 VOH -- Output high voltage [V] 4.0 0 0.2 0.4 0.6 VOL -- Output low voltage [V] 0.8
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CXK5B81020J/TM
Package Outline
Unit: mm
CXK5B81020J
32PIN SOJ (PLASTIC) 400mil
+ 0.4 20.96 - 0.12 32 17
+ 0.3 10.16 - 0.12
11.05 0.12
R
0.
25
4
1 0.73 0.08 16 1.27 + 0.2 2.2 - 0.11
0.1
0.43 0.1
0.178 M
0.95
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SOJ-32P-01 SOJ032-P-0400-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY RESIN SOLDER PLATING 42 / COPPER ALLOY 1.3g
CXK5B81020TM
32PIN TSOP (II) (PLASTIC) 400mil
1.27 MAX 20.95 0.1 32 17 0.1
10.16 0.1
11.76 0.2
0.635 MIN
3.5 0.25
A
1 1.27 0.4 0.1
16 0.21 M
+ 0.05 0.127 - 0.02
0.1 0.1
+ 0.1 0.2 - 0.05
0 to 10 DETAIL A
NOTE: Dimension "" does not include mold protrusion.
PACKAGE STRUCTURE
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE TSOP (II) -32P-L01 TSOP (II) 032-P-0400-A LEAD TREATMENT LEAD MATERIAL PACKAGE WEIGHT EPOXY / PHENOL RESIN SOLDER PLATING 42 ALLOY
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0.5 0.1
9.33 0.18

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